Mr. Shimizu’s paper about Hardware Based Scalable Path Computation Engine for Multilayer Traffic Engineering in GMPLS networks was accepted for ECOC2008 presentation.

Title: “Hardware Based Scalable Path Computation Engine for Multilayer Traffic Engineering in GMPLS networks”
Authors: Sho Shimizu, Taku Kihara, Yutaka Arakawa, Naoaki Yamanaka, and Kosuke Shiba
Abstract: A parallel data-flow hardware based path computation engine that makes multilayer traffic engineering more scalable is proposed. The engine achieves 100 times faster than conventional path computation scheme.