Mr. Shimizu’s paper about parallel reconfigurable processor was accepted for an oral presentation at High Performance Switching and Routing 2008 (HPSR2008).

Sho Shimizu, Taku Kihara, Yutaka Arakawa, Naoaki Yamanaka and Kosuke Shiba,
“A prototype of a dynamically reconfigurable processor based off-loading engine for accelerating the shortest path calculation with GNU Zebra”