Yamanaka Lab. Will Join the Embedded System Development Technology Exhibition

Yamanaka lab. will exhibit the booth to the 10th Embedded System Development Technology Exhibition in Tokyo Big sight at 2007 May sixteenth to eighteenth.
The demonstration of the parallel shortest route search that uses DAPDNA-II is exhibited in the booth.
This exhibition is used so that the result of a joint research of IPFlex Ltd. and this laboratory may appeal.